Scope
NiFpga_AnalogDemultiplexer_NI5771.h
1 /*
2  * Generated with the FPGA Interface C API Generator 12.0.0
3  * for NI-RIO 12.0.0 or later.
4  */
5 
6 #ifndef __NiFpga_AnalogDemultiplexer_NI5771_h__
7 #define __NiFpga_AnalogDemultiplexer_NI5771_h__
8 
9 #ifndef NiFpga_Version
10  #define NiFpga_Version 1200
11 #endif
12 
13 #include "NiFpga.h"
14 
22 #define NiFpga_AnalogDemultiplexer_NI5771_Bitfile "NiFpga_AnalogDemultiplexer_NI5771.lvbitx"
23 
27 static const char* const NiFpga_AnalogDemultiplexer_NI5771_Signature = "CF20D93E8A5A64AF7506A904B23F975B";
28 
29 typedef enum
30 {
31  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_Acquiring = 0x16,
32  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_Configured = 0x72,
33  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_IOModuleAIOverRange = 0x8000004A,
34  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_InterloopFIFOoverflow = 0x80000046,
35  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_InterloopFIFOtimeout = 0x2,
36  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_PLLLocked = 0x6A,
37  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_ToHostFIFOOverflowA1 = 0x12,
38  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_ToHostFIFOOverflowA2 = 0xA,
39  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_UserCommandIdle = 0x5A,
40  NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool_UserError = 0x6E,
41 } NiFpga_AnalogDemultiplexer_NI5771_IndicatorBool;
42 
43 typedef enum
44 {
45  NiFpga_AnalogDemultiplexer_NI5771_IndicatorU8_UserCommandStatus = 0x5E,
46 } NiFpga_AnalogDemultiplexer_NI5771_IndicatorU8;
47 
48 typedef enum
49 {
50  NiFpga_AnalogDemultiplexer_NI5771_IndicatorU32_PixelcounterA1 = 0xC,
51  NiFpga_AnalogDemultiplexer_NI5771_IndicatorU32_PixelcounterA2 = 0x4,
52 } NiFpga_AnalogDemultiplexer_NI5771_IndicatorU32;
53 
54 typedef enum
55 {
56  NiFpga_AnalogDemultiplexer_NI5771_ControlBool_Acquire = 0x1E,
57  NiFpga_AnalogDemultiplexer_NI5771_ControlBool_Acquirecontinuously = 0x26,
58  NiFpga_AnalogDemultiplexer_NI5771_ControlBool_ClearInterloopFIFO = 0x4E,
59  NiFpga_AnalogDemultiplexer_NI5771_ControlBool_UserCommandCommit = 0x52,
60  NiFpga_AnalogDemultiplexer_NI5771_ControlBool_Waitfortrigger = 0x1A,
61 } NiFpga_AnalogDemultiplexer_NI5771_ControlBool;
62 
63 typedef enum
64 {
65  NiFpga_AnalogDemultiplexer_NI5771_ControlU8_BaselineU8Ch1 = 0x8000003A,
66  NiFpga_AnalogDemultiplexer_NI5771_ControlU8_BaselineU8Ch2 = 0x80000036,
67  NiFpga_AnalogDemultiplexer_NI5771_ControlU8_UserCommand = 0x56,
68  NiFpga_AnalogDemultiplexer_NI5771_ControlU8_UserData1 = 0x66,
69 } NiFpga_AnalogDemultiplexer_NI5771_ControlU8;
70 
71 typedef enum
72 {
73  NiFpga_AnalogDemultiplexer_NI5771_ControlU16_SamplesperpixelA1 = 0x32,
74  NiFpga_AnalogDemultiplexer_NI5771_ControlU16_SamplesperpixelA2 = 0x2E,
75  NiFpga_AnalogDemultiplexer_NI5771_ControlU16_SamplesperpixelAcqA1 = 0x80000042,
76  NiFpga_AnalogDemultiplexer_NI5771_ControlU16_SamplesperpixelAcqA2 = 0x8000003E,
77  NiFpga_AnalogDemultiplexer_NI5771_ControlU16_UserData0 = 0x62,
78 } NiFpga_AnalogDemultiplexer_NI5771_ControlU16;
79 
80 typedef enum
81 {
82  NiFpga_AnalogDemultiplexer_NI5771_ControlU32_RequestedpixelsA1 = 0x28,
83  NiFpga_AnalogDemultiplexer_NI5771_ControlU32_RequestedpixelsA2 = 0x20,
84 } NiFpga_AnalogDemultiplexer_NI5771_ControlU32;
85 
86 typedef enum
87 {
88  NiFpga_AnalogDemultiplexer_NI5771_TargetToHostFifoU64_ToHostA1FIFO = 1,
89  NiFpga_AnalogDemultiplexer_NI5771_TargetToHostFifoU64_ToHostA2FIFO = 0,
90 } NiFpga_AnalogDemultiplexer_NI5771_TargetToHostFifoU64;
91 
92 #endif