6 #ifndef __NiFpga_AnalogIntegrator_NI5771_h__
7 #define __NiFpga_AnalogIntegrator_NI5771_h__
10 #define NiFpga_Version 1400
22 #define NiFpga_AnalogIntegrator_NI5771_Bitfile "NiFpga_AnalogIntegrator_NI5771.lvbitx"
27 static const char*
const NiFpga_AnalogIntegrator_NI5771_Signature =
"388AC0B38E46E7AE8034AED54E95404B";
31 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_Acquiring = 0x42,
32 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_Configured = 0x62,
33 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_IOModuleAIOverRange = 0x8000000E,
34 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_InterloopFIFOOverflow = 0x8000000A,
35 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_InterloopFIFOTimeout = 0x22,
36 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_PLLLocked = 0x5A,
37 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_ToHostCh1FIFOOverflow = 0x2A,
38 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_ToHostCh2FIFOOverflow = 0x26,
39 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_UserCommandIdle = 0x4A,
40 NiFpga_AnalogIntegrator_NI5771_IndicatorBool_UserError = 0x5E,
41 } NiFpga_AnalogIntegrator_NI5771_IndicatorBool;
45 NiFpga_AnalogIntegrator_NI5771_IndicatorU8_UserCommandStatus = 0x4E,
46 } NiFpga_AnalogIntegrator_NI5771_IndicatorU8;
50 NiFpga_AnalogIntegrator_NI5771_IndicatorU32_Pixelcounter = 0x2C,
51 } NiFpga_AnalogIntegrator_NI5771_IndicatorU32;
55 NiFpga_AnalogIntegrator_NI5771_ControlBool_Acquire = 0x36,
56 NiFpga_AnalogIntegrator_NI5771_ControlBool_Acquirecontinuously = 0x3A,
57 NiFpga_AnalogIntegrator_NI5771_ControlBool_ClearInterloopFIFO = 0x1E,
58 NiFpga_AnalogIntegrator_NI5771_ControlBool_UserCommandCommit = 0x1A,
59 NiFpga_AnalogIntegrator_NI5771_ControlBool_Waitfortrigger = 0x32,
60 } NiFpga_AnalogIntegrator_NI5771_ControlBool;
64 NiFpga_AnalogIntegrator_NI5771_ControlU8_Baselinex8Ch1 = 0x80000006,
65 NiFpga_AnalogIntegrator_NI5771_ControlU8_Baselinex8Ch2 = 0x80000002,
66 NiFpga_AnalogIntegrator_NI5771_ControlU8_UserCommand = 0x46,
67 NiFpga_AnalogIntegrator_NI5771_ControlU8_UserData1 = 0x56,
68 } NiFpga_AnalogIntegrator_NI5771_ControlU8;
72 NiFpga_AnalogIntegrator_NI5771_ControlU16_UserData0 = 0x52,
73 } NiFpga_AnalogIntegrator_NI5771_ControlU16;
77 NiFpga_AnalogIntegrator_NI5771_ControlU32_Requestedpixels = 0x3C,
78 NiFpga_AnalogIntegrator_NI5771_ControlU32_Samplesperline = 0x80000014,
79 NiFpga_AnalogIntegrator_NI5771_ControlU32_Samplesperpixel = 0x80000010,
80 } NiFpga_AnalogIntegrator_NI5771_ControlU32;
84 NiFpga_AnalogIntegrator_NI5771_TargetToHostFifoU32_ToHostCh1FIFO = 1,
85 NiFpga_AnalogIntegrator_NI5771_TargetToHostFifoU32_ToHostCh2FIFO = 0,
86 } NiFpga_AnalogIntegrator_NI5771_TargetToHostFifoU32;