Scope
FPGADigitalDemultiplexer.h
1 #pragma once
2 
3 #include "FPGAInterface.h"
4 #include "FPGAIO6587.h"
5 #include "NiFpga_DigitalDemultiplexerV3.h"
6 
7 // Forward declaration
8 namespace scope {
9  namespace parameters {
10  class InputsFPGADigitalDemultiplexer;
11  }
12 }
13 
14 namespace scope {
15 
19  public FPGAInterface,
20  public FPGAIO6587 {
21 
22 protected:
25 
27  std::array<NiFpga_DigitalDemultiplexerV3_TargetToHostFifoU16, 4> fifos;
28 
30  std::array<double, 2> pixeltimes;
31 
33  std::array<NiFpga_DigitalDemultiplexerV3_ControlU32, 2> reqpixels;
34 
36  std::array<NiFpga_DigitalDemultiplexerV3_ControlU16, 2> smplsperpixel;
37 
39  std::array<NiFpga_DigitalDemultiplexerV3_ControlU16, 2> smplsperpixelacq;
40 
42  double samplingrate;
43 
44 public:
47 
50 
51  void Initialize(parameters::InputsFPGA* _parameters) override;
52  double SetPixeltime(const uint32_t& _area, const double& _pixeltime) override;
53  double SetLinetime(const uint32_t& _area, const double& _linetime) override;
54  void SetTriggering(const bool& _waitfortrigger) override;
55  void SetContinuousAcquisition(const bool& _cont) override;
56  void SetRequestedPixels(const uint32_t& _area, const uint32_t& _reqpixels) override;
57  void StartAcquisition() override;
58  void StopAcquisition() override;
59 
61  void ResetAcquisition();
62 
63  int32_t ReadPixels(DaqChunk& _chunk, const double& _timeout, bool& _timedout) override;
64 
66  void CheckFPGADiagnosis();
67 
69  void ClearFIFOs();
70 
72  void SetCountMode(const bool& _mode);
73 };
74 
75 }
void StartAcquisition() override
Starts the acquisition on the FPGA.
Abstract base class for FPGA classes.
Definition: FPGAInterface.h:18
void SetRequestedPixels(const uint32_t &_area, const uint32_t &_reqpixels) override
Sets the number of pixels per channel the FPGA should acquire, set to -1 for live scanning...
parameters::InputsFPGADigitalDemultiplexer * parameters
the parameter set
std::array< double, 2 > pixeltimes
Pixel dwell time in microseconds.
Parameters for pixel acquisition with FPGADigitalDemultiplexer.
Definition: IO.h:196
FPGADigitalDemultiplexer()
Load the FPGA bitfile, set the IO module's onboard clock, initialize the acquisition.
std::array< NiFpga_DigitalDemultiplexerV3_ControlU32, 2 > reqpixels
requested pixels for both areas
Handels the NI FlexRIO adapter module IO-6587.
Definition: FPGAIO6587.h:11
std::array< NiFpga_DigitalDemultiplexerV3_ControlU16, 2 > smplsperpixel
samples per pixel for both areas
double SetPixeltime(const uint32_t &_area, const double &_pixeltime) override
Sets the time per pixel/dwell time (in seconds)
double SetLinetime(const uint32_t &_area, const double &_linetime) override
Sets the time per line (in seconds) for the generation of the line clock (if implemented) ...
void ResetAcquisition()
Resets the acquisition.
void CheckFPGADiagnosis()
Checks the status of the FIFOs on the FPGA.
void Initialize(parameters::InputsFPGA *_parameters) override
Set initial parameters.
A DaqChunk contains data from all channels sequentially.
Definition: DaqChunk.h:9
void SetContinuousAcquisition(const bool &_cont) override
Sets if the FPGA should acquire data continuously or acquire the number of pixels per channel set wit...
std::array< NiFpga_DigitalDemultiplexerV3_TargetToHostFifoU16, 4 > fifos
all FIFOs for both areas both channels
void SetCountMode(const bool &_mode)
Set the counting mode on the FPGA.
void StopAcquisition() override
Stops the acquisition on the FPGA.
Wraps an FPGA that does two area demultiplexing and photon counting.
int32_t ReadPixels(DaqChunk &_chunk, const double &_timeout, bool &_timedout) override
Read only pixels from the FPGA FIFO.
std::array< NiFpga_DigitalDemultiplexerV3_ControlU16, 2 > smplsperpixelacq
samples per pixel for both areas, for the acquisition loop
void ClearFIFOs()
Clears the interloop and ToHost FIFOs.
Parameters for pixel acquisition with NI-FPGA.
Definition: IO.h:117
void SetTriggering(const bool &_waitfortrigger) override
Sets if the FPGA should wait for a trigger before starting acquisition.
double samplingrate
programmed sampling rate (usually 1-1.4GHz), this is double the IO modules clock rate ...