2 #include "FPGANoiseOutput.h"
3 #include "parameters/IO.h"
4 #include "helpers/DaqChunk.h"
9 assert(SCOPE_NAREAS <= 2);
11 status = NiFpga_Initialize();
13 char*
const Bitfile =
"devices\\fpga\\" NiFpga_NoiseOutput_PXIe7962R_Bitfile;
16 status = NiFpga_Open(Bitfile, NiFpga_NoiseOutput_PXIe7962R_Signature,
"RIO0", 0, &
session);
17 DBOUT(L
"FPGANoiseOutput: FPGA Session opened");
25 std::this_thread::sleep_for(std::chrono::milliseconds(500));
30 fifos[0] = NiFpga_NoiseOutput_PXIe7962R_TargetToHostFifoU16_ToHostA1Ch1FIFO;
31 fifos[1] = NiFpga_NoiseOutput_PXIe7962R_TargetToHostFifoU16_ToHostA1Ch2FIFO;
32 fifos[2] = NiFpga_NoiseOutput_PXIe7962R_TargetToHostFifoU16_ToHostA2Ch1FIFO;
33 fifos[3] = NiFpga_NoiseOutput_PXIe7962R_TargetToHostFifoU16_ToHostA2Ch2FIFO;
34 smplsperpixel[0] = NiFpga_NoiseOutput_PXIe7962R_ControlU32_SamplesperlineA1;
35 smplsperpixel[1] = NiFpga_NoiseOutput_PXIe7962R_ControlU32_SamplesperlineA2;
36 smplsperline[0] = NiFpga_NoiseOutput_PXIe7962R_ControlU32_SamplesperlineA1;
37 smplsperline[1] = NiFpga_NoiseOutput_PXIe7962R_ControlU32_SamplesperlineA2;
38 reqpixels[0] = NiFpga_NoiseOutput_PXIe7962R_ControlU32_RequestedpixelsA1;
39 reqpixels[1] = NiFpga_NoiseOutput_PXIe7962R_ControlU32_RequestedpixelsA2;
44 status = NiFpga_Finalize();
45 DBOUT(L
"FPGANoiseOutput::~FPGANoiseOutput session closed");
57 uint16_t samplesperpixel = round2ui16(_pixeltime * 1E-6 * 40E6);
60 DBOUT(L
"FPGANoiseOutput::SetPixeltime samples per pixel" << samplesperpixel);
62 return static_cast<double>(samplesperpixel*1E6/40E6);
67 uint16_t samplesperline = round2ui16(_linetime * 1E-6 * 40E6);
70 DBOUT(L
"FPGANoiseOutput::SetPixeltime samples per line" << samplesperline);
72 return static_cast<double>(samplesperline*1E6/40E6);
76 status = NiFpga_WriteBool(
session, NiFpga_NoiseOutput_PXIe7962R_ControlBool_Waitfortrigger, _waitfortrigger);
80 status = NiFpga_WriteBool(
session, NiFpga_NoiseOutput_PXIe7962R_ControlBool_Acquirecontinuously, _cont);
89 status = NiFpga_WriteBool(
session, NiFpga_NoiseOutput_PXIe7962R_ControlBool_Acquire,
true);
96 assert( (_chunk.NChannels() <= 2) && (_chunk.Area() <= 1) );
98 NiFpga_Status stat = NiFpga_Status_Success;
101 for ( uint32_t c = 0 ; c < _chunk.NChannels() ; c++ ) {
102 stat = NiFpga_ReadFifoU16(
session
103 ,
fifos[_chunk.Area() * 2 + c]
104 , &_chunk.
data[c * _chunk.PerChannel()]
105 , _chunk.PerChannel()
106 ,
static_cast<uint32_t
>(_timeout * 1000)
109 _timedout = (stat == NiFpga_Status_FifoTimeout);
121 return _chunk.PerChannel();
127 status = NiFpga_WriteBool(
session, NiFpga_NoiseOutput_PXIe7962R_ControlBool_Acquire,
false);
132 status = NiFpga_ReadBool(
session, NiFpga_NoiseOutput_PXIe7962R_IndicatorBool_ToHostA1Ch1Overflow, &b);
134 status = NiFpga_ReadBool(
session, NiFpga_NoiseOutput_PXIe7962R_IndicatorBool_ToHostA1Ch2Overflow, &b);
136 status = NiFpga_ReadBool(
session, NiFpga_NoiseOutput_PXIe7962R_IndicatorBool_ToHostA2Ch1Overflow, &b);
138 status = NiFpga_ReadBool(
session, NiFpga_NoiseOutput_PXIe7962R_IndicatorBool_ToHostA2Ch2Overflow, &b);
140 status = NiFpga_ReadBool(
session, NiFpga_NoiseOutput_PXIe7962R_IndicatorBool_Acquiring, &b);
146 for (
auto f :
fifos )
148 std::this_thread::sleep_for(std::chrono::milliseconds(50));
151 for (
auto f : fifos )
153 std::this_thread::sleep_for(std::chrono::milliseconds(50));
void StopAcquisition() override
Stops the acquisition on the FPGA.
void ClearFIFOs()
Clears the interloop and ToHost FIFOs.
int32_t ReadPixels(DaqChunk &_chunk, const double &_timeout, bool &_timedout) override
Read only pixels from the FPGA FIFO.
void SetContinuousAcquisition(const bool &_cont) override
Sets if the FPGA should acquire data continuously or acquire the number of pixels per channel set wit...
void SetRequestedPixels(const uint32_t &_area, const uint32_t &_reqpixels) override
Sets the number of pixels per channel the FPGA should acquire, set to -1 for live scanning...
void SetTriggering(const bool &_waitfortrigger) override
Sets if the FPGA should wait for a trigger before starting acquisition.
void CheckFPGADiagnosis()
Checks the status of the FIFOs on the FPGA.
std::vector< uint16_t > data
The data vector.
void Initialize(parameters::InputsFPGA *_parameters) override
Set initial parameters.
double SetPixeltime(const uint32_t &_area, const double &_pixeltime) override
Sets the time per pixel/dwell time (in seconds)
A DaqChunk contains data from all channels sequentially.
This is the include file for standard system include files, or project specific include files that ar...
bool initialized
true if already initialized
FPGANoiseOutput()
Load the FPGA bitfile, reset, set the IO module's onboard clock and initialize the acquisition...
FPGAStatusSafe status
current FPGA status.
std::array< NiFpga_NoiseOutput_PXIe7962R_ControlU32, 2 > reqpixels
requested pixels for both areas
#define DBOUT(s)
A debug output to the debug console.
std::array< NiFpga_NoiseOutput_PXIe7962R_ControlU32, 2 > smplsperpixel
samples per pixel for both areas
void StartAcquisition() override
Starts the acquisition on the FPGA.
~FPGANoiseOutput()
Close FPGA session.
double SetLinetime(const uint32_t &_area, const double &_linetime) override
Sets the time per line (in seconds) for the generation of the line clock (if implemented) ...
std::array< NiFpga_NoiseOutput_PXIe7962R_ControlU32, 2 > smplsperline
samples per line for both areas
parameters::InputsFPGANoiseOutput * parameters
the parameter set
virtual void Initialize(parameters::InputsFPGA *_parameters)
Set initial parameters.
std::array< NiFpga_NoiseOutput_PXIe7962R_TargetToHostFifoU16, 4 > fifos
both fifos for both channels and areas
NiFpga_Session session
NI FPGA session handle.